Digital Design Engineer

Das ist der Job

Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry.

Darum lohnt es sich

At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem.

Your work will enable chip innovation by developing and optimizing all aspects of the pre-silicon design flow, including: Develop internal test chips as TSMC design-process co-optimization vehicles Develop MRAM/RRAM macros and compilers as the foundation IP of TSMC process Responsibilities for developing embedded nonvolatile memory test chip and IP include: Micro-architecture: Given an architecture and requirements from circuit design team and product engineering team, write design specification and micro-architecture specification of how to implement the spec.

EDA Tool/Implementation: Utilize at least one linting tool, collaborate with the P&R team to specify SDC for synthesis and P&R, and perform logic synthesis (design compiler or Cadence’s), LEC (Logic Equivalency Checking) and STA analysis.

Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in the global semiconductor industry. The Company employs a global workforce of over 82,000 and recorded revenue over US$90 billion in 2024.

TSMC produces the chips that are found in smartphones, tablets, computers, smart TVs, cars, laptops, game consoles, data centers, and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.

You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.

RTL Implementation: Implement the micro-architecture defined above by using synthesizable Verilog or SystemVerilog according to some coding guidelines. Verification: Plan, document, and implement verification plan using Verilog, SystemVerilog, and preferably UVM.

Automation: (Optional but advantageous) Identify design and design flow problems to be automated, specify and document the input spec and automation program/utility, write program/scripts to implement the automation by Python, C/C++ or some other common scripting languages.

Job Qualifications: Master's degree or above in Electrical Engineering or any related majors. More than 5 years of non-volatile memory (flash memory, RRAM, MRAM, PCRAM) circuit or logic design experience. Familiar with EDA tools and design methodology for custom design or digital design of non-volatile memory.

It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by applicable law.

Seniority level Mid-Senior level Employment type Full-time Job function Industries Semiconductor Manufacturing #J-18808-Ljbffr