Principal Digital Design Engineer (f/m/d)

Darum lohnt es sich

Full-time Employment Type: Regular (PERM) Remote Work Available: No Job Description About the Role Renesas is seeking a Principal Digital Design Engineer to join our SoC development team in Zurich.

Key Responsibilities Define digital architecture for complex mixed-signal SoCs (power management, wireless power, connectivity) Lead design and integration of digital subsystems: control logic, FSMs, datapaths, embedded microcontroller subsystems, register maps, and bus architectures (AHB/APB or equivalent) Own RTL development end-to-end, from micro-architecture specification through to silicon Low-Power & Physical Implementation Define and drive low-power strategies including clock gating, power domain partitioning, and UPF flows Collaborate with physical design teams on synthesis, timing closure, and PPA optimisation Cross-Functional Collaboration Work closely with analog/mixed-signal teams on AMS interfaces Partner with verification teams on coverage-driven verification (UVM) Support silicon bring-up, debug, and product validation Technical Leadership Author and review micro-archi This is a senior technical leadership position with direct influence over digital architecture decisions, design methodology, and product direction for next-generation power management and connectivity SoCs.

The role demands deep expertise in digital IC design, a proven track record of silicon delivery, and the ability to operate effectively across engineering disciplines and organisational boundaries.