Principal Engineer Digital Design (f/m/div)

ph3Principal Engineer Digital Design – Research Development /h3p#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Principal Engineer Digital Design in our Research Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

Are you in? /ph3Your Role /h3pKey responsibilities in your new role /pulliConceptualize and translate custom complex signal processing algorithms from MATLAB to RTL /liliEvaluate performance trade-offs and propose innovative improvements to existing UWB features /liliPerform simulations, synthesis, timing and power analysis /liliCollaborate closely with cross-functional teams including verification, system, analog, and application engineering with internal and external stakeholders /liliDocument and share specifications and architectural choices /liliContribute to silicon validation, ensure production release, and drive continuous improvement of existing IPs and design flows /liliMentor and support team members on a day-to-day basis /li /ulh3Your Profile /h3pQualifications and skills to help you succeed /ppYou are a proactive problem-solver with strong initiative and a passion for

interdisciplinary collaboration.

You approach challenges with curiosity and flexibility, take full responsibility for your work, and thrive as an autonomous team player. /pulliMaster's or PhD degree in Electrical Engineering, Computer Science, or in a related field /liliAt least 5 years of professional or academic experience in ASIC RTL to GDS flow with ability to understand and debug VHDL and write System Verilog RTL /liliExperience in custom digital signal processing design at hardware level, ideally for wireless communications /liliExperience in RF and wireless communication technologies is a plus /liliExperience in UWB communication protocol is a strong plus /liliTape‑out experience in advanced technology nodes with knowledge of UPF flow, synthesis, timing analysis, place-and-route, DFT and CDC implementations is a plus /liliFluency in English (mandatory) /li /ulpPlease send us your CV in English. /ph3Equal

Employment Opportunity /h3pWe look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting. Please let your recruiter know if they need to pay special attention to something to enable your participation in the interview process. We base our recruiting decisions on the applicant’s experience and skills. We welcome applicants from all backgrounds. /p /p